标题: PIC24FJ64GB004 Data Sheet [打印本页] 作者: enroo_ma 时间: 2009-7-25 12:04 标题: PIC24FJ64GB004 Data Sheet CPU
Up to 16 MIPS performance
16 x 16 Hardware Multiply, Single Cycle Execution
32-bit x 16-bit Hardware Divider
C Compiler Optimized Instruction Set
System
Internal oscillator support - 31 kHz to 8 MHz, up to 32 MHz with 4X PLL
On-chip LDO Voltage Regulator
JTAG Boundary Scan and Flash Memory Program Support
Fail-Safe Clock Monitor – allows safe shutdown if clock fails
Watchdog Timer with separate RC oscillator nanoWatt Power Managed Modes Run, Idle and Sleep modes
Deep sleep mode for lowest current consumption
Multiple, Switchable Clock Modes for Optimum Performance and Power Management
Analog Features
10-bit ADC, 13 channels, 500k samples per second
3 analog comparators
Other Peripherals
2 UART Modules with LIN and IrDA® support, 4 Deep FIFO
2 SPI Modules with 8 Deep FIFO
2 I2C™ Modules with Master and Slave Modes
Five 16-bit Timer Modules
Up to 5 Input Capture and 5 Output Compare / PWM, all with dedicated timers
Hardware RTCC, Real-Time Clock Calendar with Alarms
PMP, Parallel Master Port, with 16 Address Lines, and 8/16-bit Data
Peripheral Pin Select for remapping digital peripherals to I/O
Charge Time Measurement Unit (CTMU) for capacitive touch interfaceUniversal Serial Bus Features USB v2.0 On-the-Go compliant
Dual role capable, can act as either Host or Device
Low Speed(1.5Mb/s) and Full Speed(12 Mb/s) operation in Host mode
Full speed USB operaton in Device mode
Supports 32 endpoints
On-chip USB transceiver