标题: dsPIC30F4013 Data Sheet [打印本页] 作者: enroo_ma 时间: 2009-7-29 11:59 标题: dsPIC30F4013 Data Sheet dsPIC30F3014/4013 Data Sheet (6/13/2008)
High-Performance Modified RISC CPU:
Modified Harvard architecture
C compiler optimized instruction set architecture
84 base instructions with flexible addressing modes
24-bit wide instructions, 16-bit wide data path
16 x 16-bit working register array
Up to 30 MIPs operation:
- DC to 40 MHz external clock input
- Internal FRC input with PLL active (4x, 8x, 16x)
- 4 MHz-10 MHz oscillator input with PLL active (4x, 8x, 16x)
- 10 MHz - 20 MHz oscillator input in HS/2 or HS/3 with PLL active (4x, 8x, 16x)
Peripheral and External interrupt sources
8 user selectable priority levels for each interrupt
4 processor exceptions and software traps
Primary and Alternate interrupt Vector Tables
DSP Engine Features:
Modulo and Bit-Reversed Addressing modes
Two, 40-bit wide accumulators with optional saturation logic
17-bit x 17-bit single cycle hardware fractional/ integer multiplier
Single cycle Multiply-Accumulate (MAC) operation
40-stage Barrel Shifter
Dual data fetch
Peripheral Features:
High current sink/source I/O pins: 25 mA/25 mA
Optionally pair up 16-bit timers into 32-bit timer modules
3-wire SPI™ modules (supports 4 Frame modes)
I2C™ module supports Multi-Master/Slave mode and 7-bit/10-bit addressing
Addressable UART modules with FIFO buffers and selectable pins
Data Converter Interface (DCI) supports common audio Codec protocols, including I2S and AC’97
Analog Features:
12-bit 200 Ksps Analog-to-Digital Converter (A/D)
A/D Conversion available during Sleep and Idle
1 Sample/Hold
Multiple Conversion Sequencing Options
Special Microcontroller Features:
Enhanced Flash program memory:
- 10,000 erase/write cycle (min.) for industrial temperature range, 100K (typical)
Data EEPROM memory:
- 100,000 erase/write cycle (min.) for industrial temperature range, 1M (typical)
Self-reprogrammable under software control
Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
Flexible Watchdog Timer (WDT) with on-chip low power RC oscillator for reliable operation
Fail-Safe clock monitor operation
Detects clock failure and switches to on-chip low power RC oscillator
Programmable code protection
In-Circuit Serial Programming™ (ICSP™)
Programmable Brown-out Detection and Reset generation
Selectable Power Management modes
- Sleep, Idle and Alternate Clock modes
CMOS Technology:
Low power, high speed Flash technology
Wide operating voltage range (2.5V to 5.5V)
Industrial and Extended temperature ranges
Low power consumption
