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ENC424J600/ENC624J600 Data Sheet

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发表于 2010-4-17 18:32:59 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式
  ENC424J600/ENC624J600 Data Sheet


Microchip's ENC424J600 offers low-cost stand-alone 10/100 Base-T Ethernet interface controller with integrated MAC & PHY, hardware cryptographic security engines and factory preprogrammed unique MAC address. A 24-Kbyte on-chip RAM buffer is available for TX and RX operations. The ENC424J600 have an industry standard Serial Peripheral Interface (SPI) or a parallel interface. They are designed to serve as an Ethernet network interface for any microcontroller equipped with SPI or a standard parallel port. Microchip’s ENC424J600 enables designers to create secured network- and Internet-connected embedded applications with minimized board space, cost and complexity.
Ethernet Application Design Center
   

Parameter Name  Value
MAC  Yes
PHY  Yes
TX/RX RAM Buffer(bytes)  24576
Interrupt Pin  1
LEDs  2
Op. Voltage (V)  3.3
Temp. Range Min. (°C)  -40
Temp. Range Max. (°C)  85
Max. Speed (MHz)  25
Interface  SPI and Parallel
Pre-Programmed MAC Address  Yes
Security Engines  Yes
Standalone Ethernet Controller  100Base-T

     Features
General:
- IEEE 802.3™ Compliant Fast Ethernet Controller
- Integrated MAC and 10/100Base-T PHY
- Hardware Security Acceleration Engines
- Factory Preprogrammed Unique MAC Address
- Supports one 10/100Base-T Port with Automatic Polarity Detection and Correction
- Supports Auto-Negotiation
- Support for Pause Control Frames, including Automatic Transmit and Receive Flow Control
- Supports Half and Full-Duplex Operation
- Programmable Automatic Retransmit on Collision
Available MCU Interfaces:
- 14 Mbit/s SPI interface with enhanced set of opcodes
- 8-bit multiplexed parallel interface
Security Engines:
- High-performance, modular exponentiation engine with up to 1024-bit operands
- Supports RSA® and Diffie-Hellman key exchange algorithms
- Fast MD5 hash computations
- Fast SHA-1 hash computations
Package:
44-Pin (TQFP and QFN)


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