dsPIC33FJ12MC202 Data Sheet

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  dsPIC33FJ12MC201/202 Data Sheet (6/18/2009)


Operating Range:

DC – 40 MIPS (40 MIPS at 3.0-3.6V, -40°C to +85°C)
Industrial temperature range (-40°C to +85°C)
Extended temperature range (-40°C to +125°C)
High-Performance DSC CPU:
Modified Harvard architecture
C compiler optimized instruction set
16-bit wide data path
24-bit wide instructions
Linear program memory addressing up to 4M instruction words
Linear data memory addressing up to 64 Kbytes
83 base instructions: mostly 1 word/1 cycle
Two 40-bit accumulators with rounding and saturation options
Flexible and powerful addressing modes:
   - Indirect
   - Modulo
   - Bit-Reversed
Software stack
16 x 16 fractional/integer multiply operations
32/16 and 16/16 divide operations
Single-cycle multiply and accumulate:
   - Accumulator write back for DSP operations
   - Dual data fetch
Up to ±16-bit shifts for up to 40-bit data Timers/Capture/Compare/PWM:
Timer/Counters, up to three 16-bit timers
   - Can pair up to make one 32-bit timer
   - 1 timer runs as Real-Time Clock with external 32.768 kHz oscillator
   - Programmable prescaler
Input Capture (up to 4 channels):
   - Capture on up, down or both edges
   - 16-bit capture input functions
   - 4-deep FIFO on each capture
Output Compare (up to 2 channels):
   - Single or Dual 16-Bit Compare mode
   - 16-bit Glitchless PWM mode
Interrupt Controller:
5-cycle latency
118 interrupt vectors
Up to 26 available interrupt sources
Up to 3 external interrupts
7 programmable priority levels
4 processor exceptions
Digital I/O:
Peripheral pin Select functionality
Up to 21 programmable digital I/O pins
Wake-up/Interrupt-on-Change for up to 21 pins
Output pins can drive from 3.0V to 3.6V
Up to 5V with output drain configuration
All digital input pins are 5V tolerant
4 mA sink on all I/O pins
On-Chip Flash and SRAM:
Flash program memory, up to 12 Kbytes
Data SRAM, up to 1 Kbyte
Boot and General Security for Program Flash
System Management:
Flexible clock options:
   - External, crystal, resonator, internal RC
   - Fully integrated Phase-Locked Loop (PLL)
   - Extremely low jitter PLL
Power-up Timer
Oscillator Start-up Timer/Stabilizer
Watchdog Timer with its own RC oscillator
Fail-Safe Clock Monitor
Reset by multiple sources
Power Management:
On-chip 2.5V voltage regulator
Switch between clock sources in real time
Idle, Sleep and Doze modes with fast wake-up
Package options:
28-pin SDIP, SOIC and QFN
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