PIC24FJ48GA004 Data Sheet

enroo_ma

  PIC24FJ64GA004 Family Data Sheet (1/25/2008)


CPU

        Up to 16 MIPS performance
        17 x 17 Hardware Multiply, Single Cycle Execution
        32-bit x 16-bit Hardware Divider
        C Compiler Optimized Instruction Set
System
        Internal oscillator support - 31 kHz to 8 MHz, up to 32 MHz with 4X PLL
        On-chip LDO Voltage Regulator
        JTAG Boundary Scan and Flash Memory Program Support
        Fail-Safe Clock Monitor – allows safe shutdown if clock fails
        Watchdog Timer with separate RC oscillator
nanoWatt Power Managed Modes
        Run, Idle and Sleep modes
        Multiple, Switchable Clock Modes for Optimum Performance and Power Management
Analog Features
        10-bit ADC, 10 channels, 500k samples per second
        Two Analog comparators
Peripherals
        2 UART Modules with LIN and IrDA support, 4 Deep FIFO
        2 SPI ™ Modules with 8 Deep FIFO
        2 I2C™ Modules with Master and Slave Modes
        Five 16-bit Timer Modules
        Up to 5 Input Capture and 5 Output Compare / PWM
        Hardware RTCC, Real-Time Clock Calendar with Alarms
        PMP, Parallel Master Port, with 8 Address Lines, and 8/16-bit Data
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