PIC18F4520 Data Sheet

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  PIC18F2420/2520/4420/4520 Data Sheet (11/21/2008)


Power-Managed Modes:
• Run: CPU on, Peripherals on
• Idle: CPU off, Peripherals on
• Sleep: CPU off, Peripherals off
• Idle mode Currents Down to 5.8 μA Typical
• Sleep mode Current Down to 0.1 μA Typical
• Timer1 Oscillator: 1.8 μA, 32 kHz, 2V
• Watchdog Timer: 2.1 μA
• Two-Speed Oscillator Start-up
Peripheral Highlights:
• High-Current Sink/Source 25 mA/25 mA
• Three Programmable External Interrupts
• Four Input Change Interrupts
• Up to 2 Capture/Compare/PWM (CCP) modules,
one with Auto-Shutdown (28-pin devices)
• Enhanced Capture/Compare/PWM (ECCP)
module (40/44-pin devices only):
- One, two or four PWM outputs
- Selectable polarity
- Programmable dead time
- Auto-shutdown and auto-restart
• Master Synchronous Serial Port (MSSP) module
supporting 3-Wire SPI (all 4 modes) and I
2C™
Master and Slave modes
• Enhanced Addressable USART module:
- Supports RS-485, RS-232 and LIN 1.2
- RS-232 operation using internal oscillator
block (no external crystal required)
- Auto-wake-up on Start bit
- Auto-Baud Detect
• 10-Bit, up to 13-Channel Analog-to-Digital (A/D)
Converter module:
- Auto-acquisition capability
- Conversion available during Sleep
• Dual Analog Comparators with Input Multiplexing
Flexible Oscillator Structure:
• Four Crystal modes, up to 40 MHz
• 4x Phase Lock Loop (available for crystal and
internal oscillators)
• Two External RC modes, up to 4 MHz
• Two External Clock modes, up to 40 MHz
• Internal Oscillator Block:
- 8 user-selectable frequencies, from 31 kHz to
8MHz
- Provides a complete range of clock speeds
from 31 kHz to 32 MHz when used with PLL
- User-tunable to compensate for frequency drift
• Secondary Oscillator using Timer1 @ 32 kHz
• Fail-Safe Clock Monitor:
- Allows for safe shutdown if peripheral clock stops
Special Microcontroller Features:
• C Compiler Optimized Architecture:
- Optional extended instruction set designed to
optimize re-entrant code
• 100,000 Erase/Write Cycle Enhanced Flash
Program Memory Typical
• 1,000,000 Erase/Write Cycle Data EEPROM
Memory Typical
• Flash/Data EEPROM Retention: 100 Years Typical
• Self-Programmable under Software Control
• Priority Levels for Interrupts
• 8 x 8 Single-Cycle Hardware Multiplier
• Extended Watchdog Timer (WDT):
- Programmable period from 4 ms to 131s
• Single-Supply 5V In-Circuit Serial
Programming™ (ICSP™) via Two Pins
• In-Circuit Debug (ICD) via Two Pins
• Wide Operating Voltage Range: 2.0V to 5.5V
• Programmable 16-Level High/Low-Voltage
Detection (HLVD) module:
- Supports interrupt on High/Low-Voltage
Detection
• Programmable Brown-out Reset (BOR)
- With software enable option


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